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7110 TMS320C44 PMC: (from Pentek)
Single TMS320C44 PMC Module, 5-MFLOPS, 50 MHz, 132 Mbyte/sec transfer rate over PCI bus, 4x20 Mbyte/ses comm ports; 512 kB 0-wait-state SRAM for global bus, 512 kB flash EEPROM, Dual FIFO PCI interface using PLX 9060, complete development tools.

ADM-XPL: (from Alpha Data)
Based on the Virtex-II Pro Platform FPGA from Xilinx, the XPL provides a powerful and simple solution for prototyping and embedding. Features include PCI66/64, DDR SDRAM, ZBT, high desity adaptable I/O and Software Development Kit with templates for embedded PowerPC and FPGA fabric

ADM-XRC: (from Alpha Data)
Xilinx Virtex based reconfigurable computer. Leverages rapid hardware integration of a wide range of DSP cores including FFTs and FIRs supporting applications equivalent to 160 billion MACs. <BR>Range of Virtex/E/EM FPGAs from 400K to 2000K gates, with 4 independent banks of 256k x 36 SSRAM, programmable clocks, flash memory, IO connector and SDK for WinNT/2000/XP, linux and VxWorks.

ADM-XRC-II: (from Alpha Data)
Xilinx Virtex-II based reconfigurable computer. Leverages rapid hardware integration of a wide range of DSP cores available from Alpha Data and third parties. Capable of up to 600 billion MACs per second DSP performance. Support for Matlab/Simulink with common API and drivers for WinNT, Win2000, linux and VxWorks.

Hammerhead-PMC: (from BittWare, Inc.)
The HHPM incorporates BittWare's SharcFIN ASIC, which flexibly interfaces the 21160 DSPs to the 64-bit, 66 MHz PCI bus, the SDRAM, the FLASH memory, and a peripheral bus. It also provides a feature-rich set of DMA functions and interrupt options to support very high-speed, real-time data flow with minimum processor overhead. The HHPM is configured with four 80 MHz ADSP-21160 processors, each with 4 Mbits of dual-ported, on-chip SRAM. The ADSP-21160 DSPs are code-compatible with the ADSP-2106x SHARC DSPs, making it easier to integrate existing code. The four ADSP-21160 processors share a common 40 MHz, 64-bit processor bus, which gives them access to the board´s SDRAM, the PCI bus interface, and the other three SHARCs. For additional I/O, each processor also has four flags, three interrupts, six link ports, and two serial ports. The PMC+ interface consists of four connectors: three standard PMC connectors to provide the PCI interface and an additional PMC+ connector that provides four 80 MB/s link ports and a serial TDM bus from the ADSP-21160 DSPs to the carrier board. The Hammerhead-PMC+ attaches to any PMC-capable carrier board, and when attached to one of BittWare's PMC+ capable carrier boards, it can use the PMC+ link and serial port connections for low-latency, tightly-coupled I/O.

MM-7105 PMC Virtex-4 FPGA: (from Curtiss-Wright Controls, Inc.)
In terms of logic resources, the MM-7105 is one of the most powerful FPGA processing engines ever to be offered on the PMC form factor. Utilizing Xilinx's largest Virtex-4 FPGA, the LX200, the MM-7105 addresses the most demanding signal processing requirements in a modular, flexible PMC form factor.

The MM-7105 can be utilized on PowerPC and x86 Single Board Computers, Altivec DSP boards, A/D converters, graphic engines or any carrier that has a PCI Mezzanine Card (PMC) site. The MM-7105 module's primary bus that interfaces to the host system is located in the LX200 FPGA. This PCI/PCI-X bus provides a data transfer, communication and control plane to the rest of the system. It supports 32-bit and 64-bit PCI transfers at 33MHz/66MHz, or 64-bit PCI-X transfers at 66MHz/133MHz, and is compliant with the with IEEE P1386/P1386.1 CMC/PMC draft standard and ANSI/VITA 20-2001 (R2005).

PMC-FPGA05 Virtex-5 LX110 based PMC: (from Curtiss-Wright Controls, Inc.)
The PMC-FPGA05 Kit is a Xilinx® Virtex™-5 XC5VLX110 platform FPGA based, PMC card with high speed digital I/O and PCI-X interface to the host computer.

Xilinx Virtex-5 FPGA The new generation of platform FPGA supports logic gates with hard-wired functionality, including high-speed serial communications and DSP multipliers, making them ideal for a wide range of reconfigurable computing applications. The PMC-FPGA05 enhances the processing power and flexibility of the Virtex-5 XC5VLX110 FPGA with large, independent pools of memory, a wide range of I/O possibilities and a comprehensive board support package.

Reef-PMC+: (from BittWare, Inc.)
Reconfigurable FPGA card with ADSP-21160. BittWare´s Reef-PMC+ (RFPM) is a reconfigurable FPGA board combining the power of the XILINX Virtex-II FPGA and the Analog Devices ADSP-21160 SHARC® DSP. Configurable for nearly any application, the RFPM allows system designers to take advantage of both the flexibility of a reconfigurable FPGA and the processing power of a general-purpose DSP. The Virtex-II features up to 1 million system gates, a flexible digital I/O interface, and reconfigurable computing blocks. And the ADSP-21160 DSP provides additional I/O and processing power for the board. Rounding out the RFPM´s feature set are a 64/66 PCI interface, a 64-512 MB bank of SDRAM, and 2 MB of Flash memory. The Virtex-II reconfigurable FPGA from XILINX is a powerful tool for designing custom digital interfaces based on IP cores and customized modules. The RFPM features a flexible digital I/O interface that provides up to 140 user I/O pins, each of which is individually configurable for any of nineteen single-ended I/O standards and six differential I/O standards, including LVDS, SSTL, HSTL II, and GTL+. Any two I/O pins can be used as a differential pair, providing maximum board layout flexibility. The Virtex-II is configured on power-up by the host or an on-board EPROM, and it supports reconfiguration “on-the-fly” from either the host or the ADSP-21160 DSP.

SPMC/DPMC-440 ProWare FPGA: (from Curtiss-Wright Controls, Inc.)
The PMC-440 ProWare PMC module provides systems integrators with a powerful, easy-to-use means to capture EO/IR and radar inputs, interface to legacy system elements, and perform sensor data pre-processing. The ProWare module offers flexibility with its choice of I/O options that include LVDS, LVTTL, and RocketIO. Ease-of-use is provided via a comprehensive ProWare Design Kit (PDK) that includes a library of IP modules, simulation testbench files, a reference design, and full documentation.

T2-PMC: (from BittWare, Inc.)
BittWare´s T2-PMC (T2PM) DSP board features the ADSP-TS201 TigerSHARC processor from Analog Devices. To take full advantage of this high-performance DSP, this multiprocessor PCI Mezzanine Card (PMC) implements BittWare´s ATLANTiS (Advanced Transfer Link Architecture for New TigerSHARC) architecture, which combines robust TigerSHARC processing with the versatile Virtex-II Pro FPGA from Xilinx to offer ultra high performance and unprecedented I/O bandwidth. The T2PM matches a cluster of four ADSP-TS201 TigerSHARCs with: (1) High-bandwidth, low-latency off-board I/O, reconfigurable for nearly any application (2) High-speed interprocessor communication network to facilitate scalability (3) SharcFIN PCI-DSP bridge for integrating DSPs with PCI bus and other peripherals (4) Comprehensive software for ease-of-use. The board also provides a large on-board bank of SDRAM and flash memory for hostless boot.

Tiger-PMC: (from BittWare, Inc.)
The TSPM´s four ADSP-TS101S TigerSHARC DSPs share a common 83.3 MHz local bus, which also provides access to the SDRAM and SharcFIN ASIC. Each TigerSHARC provides 12 Gbytes/sec of internal memory bandwidth and features 6 Mbits of on-chip SRAM. It supports both fixed and floating point operation, providing 1500 MFLOPS of processing power for 32-bit floating point operations and 6 GOPS for 16-bit fixed point operations. Providing the backbone of the TSPM´s architecture is BittWare´s SharcFIN for the ADSP-TS101S. The SharcFIN features a comprehensive set of bus interfaces and peripherals for the ADSP-TS101S DSPs and provides a clean board-level implementation. It integrates a full 64-bit 66 MHz master PCI interface, an extensive flag and interrupt multiplexer, and a peripheral bus that interfaces the DSPs to peripherals such as the Flash memory. I/O interfaces on the TSPM include the PMC+ interface and four front-panel external link ports. The PMC+ interface consists of four connectors: three standard PMC connectors to provide the PCI interface and an additional PMC+ connector that provides four 250 Mbytes/sec link ports from the ADSP-TS101S DSPs to the carrier board. The TSPM attaches to any PMC capable carrier board, and when attached to one of BittWare´s PMC+ capable carrier boards, it can use the PMC+ link port connections for low-latency, tightly-coupled I/O.

TPMC630-10: (from TEWS TECHNOLGIES GmbH)
Reconfigurable FPGA with 64 TTL I/O Lines; PCI Target Controller (PCI9030) with user configurable FPGA (300000 system gates: Xilinx XC2S300E-6); FPGA development tool: Free Xilinx ISE WebPack; FPGA configuration by in system programmable FlashProm via PCI bus; several clock options by programmable clock generator; 64 digital TTL I/O lines; All I/O lines on HD68 SCSI-3 type connector in front panel and on P14; PCI I/O signaling voltage 3.3V and 5V; Operating temperature -40°C to +85°C

TPMC630-11: (from TEWS TECHNOLGIES GmbH)
Reconfigurable FPGA with 32 differential I/O Lines; PCI Target Controller (PCI9030) with user configurable FPGA (300000 system gates: Xilinx XC2S300E-6); FPGA development tool: Free Xilinx ISE WebPack; FPGA configuration by in system programmable FlashProm via PCI bus; several clock options by programmable clock generator; 32 differential I/O lines with on board termination; All I/O lines on HD68 SCSI-3 type connector in front panel and on P14; PCI I/O signaling voltage 3.3V and 5V; Operating temperature -40°C to +85°C

TPMC630-12: (from TEWS TECHNOLGIES GmbH)
Reconfigurable FPGA with 32 TTL I/O Lines and 16 differential I/O Lines; PCI Target Controller (PCI9030) with user configurable FPGA (300000 system gates: Xilinx XC2S300E-6); FPGA development tool: Free Xilinx ISE WebPack; FPGA configuration by in system programmable FlashProm via PCI bus; several clock options by programmable clock generator; 32 digital TTL I/O lines and 16 differential I/O lines with on board termination; All I/O lines on HD68 SCSI-3 type connector in front panel and on P14; PCI I/O signaling voltage 3.3V and 5V; Operating temperature -40°C to +85°C: Single TMS320C44 PMC Module, 5-MFLOPS, 50 MHz, 132 Mbyte/sec transfer rate over PCI bus, 4x20 Mbyte/ses comm ports; 512 kB 0-wait-state SRAM for global bus, 512 kB flash EEPROM, Dual FIFO PCI interface using PLX 9060, complete development tools.
ADM-XPL: (from Alpha Data)
Based on the Virtex-II Pro Platform FPGA from Xilinx, the XPL provides a powerful and simple solution for prototyping and embedding. Features include PCI66/64, DDR SDRAM, ZBT, high desity adaptable I/O and Software Development Kit with templates for embedded PowerPC and FPGA fabric

ADM-XRC: (from Alpha Data)
Xilinx Virtex based reconfigurable computer. Leverages rapid hardware integration of a wide range of DSP cores including FFTs and FIRs supporting applications equivalent to 160 billion MACs. <BR>Range of Virtex/E/EM FPGAs from 400K to 2000K gates, with 4 independent banks of 256k x 36 SSRAM, programmable clocks, flash memory, IO connector and SDK for WinNT/2000/XP, linux and VxWorks.

ADM-XRC-II: (from Alpha Data)
Xilinx Virtex-II based reconfigurable computer. Leverages rapid hardware integration of a wide range of DSP cores available from Alpha Data and third parties. Capable of up to 600 billion MACs per second DSP performance. Support for Matlab/Simulink with common API and drivers for WinNT, Win2000, linux and VxWorks.

Hammerhead-PMC: (from BittWare, Inc.)
The HHPM incorporates BittWare's SharcFIN ASIC, which flexibly interfaces the 21160 DSPs to the 64-bit, 66 MHz PCI bus, the SDRAM, the FLASH memory, and a peripheral bus. It also provides a feature-rich set of DMA functions and interrupt options to support very high-speed, real-time data flow with minimum processor overhead. The HHPM is configured with four 80 MHz ADSP-21160 processors, each with 4 Mbits of dual-ported, on-chip SRAM. The ADSP-21160 DSPs are code-compatible with the ADSP-2106x SHARC DSPs, making it easier to integrate existing code. The four ADSP-21160 processors share a common 40 MHz, 64-bit processor bus, which gives them access to the board´s SDRAM, the PCI bus interface, and the other three SHARCs. For additional I/O, each processor also has four flags, three interrupts, six link ports, and two serial ports. The PMC+ interface consists of four connectors: three standard PMC connectors to provide the PCI interface and an additional PMC+ connector that provides four 80 MB/s link ports and a serial TDM bus from the ADSP-21160 DSPs to the carrier board. The Hammerhead-PMC+ attaches to any PMC-capable carrier board, and when attached to one of BittWare's PMC+ capable carrier boards, it can use the PMC+ link and serial port connections for low-latency, tightly-coupled I/O.

MM-7105 PMC Virtex-4 FPGA: (from Curtiss-Wright Controls, Inc.)
In terms of logic resources, the MM-7105 is one of the most powerful FPGA processing engines ever to be offered on the PMC form factor. Utilizing Xilinx's largest Virtex-4 FPGA, the LX200, the MM-7105 addresses the most demanding signal processing requirements in a modular, flexible PMC form factor.

The MM-7105 can be utilized on PowerPC and x86 Single Board Computers, Altivec DSP boards, A/D converters, graphic engines or any carrier that has a PCI Mezzanine Card (PMC) site. The MM-7105 module's primary bus that interfaces to the host system is located in the LX200 FPGA. This PCI/PCI-X bus provides a data transfer, communication and control plane to the rest of the system. It supports 32-bit and 64-bit PCI transfers at 33MHz/66MHz, or 64-bit PCI-X transfers at 66MHz/133MHz, and is compliant with the with IEEE P1386/P1386.1 CMC/PMC draft standard and ANSI/VITA 20-2001 (R2005).

PMC-FPGA05 Virtex-5 LX110 based PMC: (from Curtiss-Wright Controls, Inc.)
The PMC-FPGA05 Kit is a Xilinx® Virtex™-5 XC5VLX110 platform FPGA based, PMC card with high speed digital I/O and PCI-X interface to the host computer.

Xilinx Virtex-5 FPGA The new generation of platform FPGA supports logic gates with hard-wired functionality, including high-speed serial communications and DSP multipliers, making them ideal for a wide range of reconfigurable computing applications. The PMC-FPGA05 enhances the processing power and flexibility of the Virtex-5 XC5VLX110 FPGA with large, independent pools of memory, a wide range of I/O possibilities and a comprehensive board support package.

Reef-PMC+: (from BittWare, Inc.)
Reconfigurable FPGA card with ADSP-21160. BittWare´s Reef-PMC+ (RFPM) is a reconfigurable FPGA board combining the power of the XILINX Virtex-II FPGA and the Analog Devices ADSP-21160 SHARC® DSP. Configurable for nearly any application, the RFPM allows system designers to take advantage of both the flexibility of a reconfigurable FPGA and the processing power of a general-purpose DSP. The Virtex-II features up to 1 million system gates, a flexible digital I/O interface, and reconfigurable computing blocks. And the ADSP-21160 DSP provides additional I/O and processing power for the board. Rounding out the RFPM´s feature set are a 64/66 PCI interface, a 64-512 MB bank of SDRAM, and 2 MB of Flash memory. The Virtex-II reconfigurable FPGA from XILINX is a powerful tool for designing custom digital interfaces based on IP cores and customized modules. The RFPM features a flexible digital I/O interface that provides up to 140 user I/O pins, each of which is individually configurable for any of nineteen single-ended I/O standards and six differential I/O standards, including LVDS, SSTL, HSTL II, and GTL+. Any two I/O pins can be used as a differential pair, providing maximum board layout flexibility. The Virtex-II is configured on power-up by the host or an on-board EPROM, and it supports reconfiguration “on-the-fly” from either the host or the ADSP-21160 DSP.

SPMC/DPMC-440 ProWare FPGA: (from Curtiss-Wright Controls, Inc.)
The PMC-440 ProWare PMC module provides systems integrators with a powerful, easy-to-use means to capture EO/IR and radar inputs, interface to legacy system elements, and perform sensor data pre-processing. The ProWare module offers flexibility with its choice of I/O options that include LVDS, LVTTL, and RocketIO. Ease-of-use is provided via a comprehensive ProWare Design Kit (PDK) that includes a library of IP modules, simulation testbench files, a reference design, and full documentation.

T2-PMC: (from BittWare, Inc.)
BittWare´s T2-PMC (T2PM) DSP board features the ADSP-TS201 TigerSHARC processor from Analog Devices. To take full advantage of this high-performance DSP, this multiprocessor PCI Mezzanine Card (PMC) implements BittWare´s ATLANTiS (Advanced Transfer Link Architecture for New TigerSHARC) architecture, which combines robust TigerSHARC processing with the versatile Virtex-II Pro FPGA from Xilinx to offer ultra high performance and unprecedented I/O bandwidth. The T2PM matches a cluster of four ADSP-TS201 TigerSHARCs with: (1) High-bandwidth, low-latency off-board I/O, reconfigurable for nearly any application (2) High-speed interprocessor communication network to facilitate scalability (3) SharcFIN PCI-DSP bridge for integrating DSPs with PCI bus and other peripherals (4) Comprehensive software for ease-of-use. The board also provides a large on-board bank of SDRAM and flash memory for hostless boot.

Tiger-PMC: (from BittWare, Inc.)
The TSPM´s four ADSP-TS101S TigerSHARC DSPs share a common 83.3 MHz local bus, which also provides access to the SDRAM and SharcFIN ASIC. Each TigerSHARC provides 12 Gbytes/sec of internal memory bandwidth and features 6 Mbits of on-chip SRAM. It supports both fixed and floating point operation, providing 1500 MFLOPS of processing power for 32-bit floating point operations and 6 GOPS for 16-bit fixed point operations. Providing the backbone of the TSPM´s architecture is BittWare´s SharcFIN for the ADSP-TS101S. The SharcFIN features a comprehensive set of bus interfaces and peripherals for the ADSP-TS101S DSPs and provides a clean board-level implementation. It integrates a full 64-bit 66 MHz master PCI interface, an extensive flag and interrupt multiplexer, and a peripheral bus that interfaces the DSPs to peripherals such as the Flash memory. I/O interfaces on the TSPM include the PMC+ interface and four front-panel external link ports. The PMC+ interface consists of four connectors: three standard PMC connectors to provide the PCI interface and an additional PMC+ connector that provides four 250 Mbytes/sec link ports from the ADSP-TS101S DSPs to the carrier board. The TSPM attaches to any PMC capable carrier board, and when attached to one of BittWare´s PMC+ capable carrier boards, it can use the PMC+ link port connections for low-latency, tightly-coupled I/O.

TPMC630-10: (from TEWS TECHNOLGIES GmbH)
Reconfigurable FPGA with 64 TTL I/O Lines; PCI Target Controller (PCI9030) with user configurable FPGA (300000 system gates: Xilinx XC2S300E-6); FPGA development tool: Free Xilinx ISE WebPack; FPGA configuration by in system programmable FlashProm via PCI bus; several clock options by programmable clock generator; 64 digital TTL I/O lines; All I/O lines on HD68 SCSI-3 type connector in front panel and on P14; PCI I/O signaling voltage 3.3V and 5V; Operating temperature -40°C to +85°C

TPMC630-11: (from TEWS TECHNOLGIES GmbH)
Reconfigurable FPGA with 32 differential I/O Lines; PCI Target Controller (PCI9030) with user configurable FPGA (300000 system gates: Xilinx XC2S300E-6); FPGA development tool: Free Xilinx ISE WebPack; FPGA configuration by in system programmable FlashProm via PCI bus; several clock options by programmable clock generator; 32 differential I/O lines with on board termination; All I/O lines on HD68 SCSI-3 type connector in front panel and on P14; PCI I/O signaling voltage 3.3V and 5V; Operating temperature -40°C to +85°C

TPMC630-12: (from TEWS TECHNOLGIES GmbH)
Reconfigurable FPGA with 32 TTL I/O Lines and 16 differential I/O Lines; PCI Target Controller (PCI9030) with user configurable FPGA (300000 system gates: Xilinx XC2S300E-6); FPGA development tool: Free Xilinx ISE WebPack; FPGA configuration by in system programmable FlashProm via PCI bus; several clock options by programmable clock generator; 32 digital TTL I/O lines and 16 differential I/O lines with on board termination; All I/O lines on HD68 SCSI-3 type connector in front panel and on P14; PCI I/O signaling voltage 3.3V and 5V; Operating temperature -40°C to +85°C: Based on the Virtex-II Pro Platform FPGA from Xilinx, the XPL provides a powerful and simple solution for prototyping and embedding. Features include PCI66/64, DDR SDRAM, ZBT, high desity adaptable I/O and Software Development Kit with templates for embedded PowerPC and FPGA fabric
ADM-XRC: (from Alpha Data)
Xilinx Virtex based reconfigurable computer. Leverages rapid hardware integration of a wide range of DSP cores including FFTs and FIRs supporting applications equivalent to 160 billion MACs. <BR>Range of Virtex/E/EM FPGAs from 400K to 2000K gates, with 4 independent banks of 256k x 36 SSRAM, programmable clocks, flash memory, IO connector and SDK for WinNT/2000/XP, linux and VxWorks.

ADM-XRC-II: (from Alpha Data)
Xilinx Virtex-II based reconfigurable computer. Leverages rapid hardware integration of a wide range of DSP cores available from Alpha Data and third parties. Capable of up to 600 billion MACs per second DSP performance. Support for Matlab/Simulink with common API and drivers for WinNT, Win2000, linux and VxWorks.

Hammerhead-PMC: (from BittWare, Inc.)
The HHPM incorporates BittWare's SharcFIN ASIC, which flexibly interfaces the 21160 DSPs to the 64-bit, 66 MHz PCI bus, the SDRAM, the FLASH memory, and a peripheral bus. It also provides a feature-rich set of DMA functions and interrupt options to support very high-speed, real-time data flow with minimum processor overhead. The HHPM is configured with four 80 MHz ADSP-21160 processors, each with 4 Mbits of dual-ported, on-chip SRAM. The ADSP-21160 DSPs are code-compatible with the ADSP-2106x SHARC DSPs, making it easier to integrate existing code. The four ADSP-21160 processors share a common 40 MHz, 64-bit processor bus, which gives them access to the board´s SDRAM, the PCI bus interface, and the other three SHARCs. For additional I/O, each processor also has four flags, three interrupts, six link ports, and two serial ports. The PMC+ interface consists of four connectors: three standard PMC connectors to provide the PCI interface and an additional PMC+ connector that provides four 80 MB/s link ports and a serial TDM bus from the ADSP-21160 DSPs to the carrier board. The Hammerhead-PMC+ attaches to any PMC-capable carrier board, and when attached to one of BittWare's PMC+ capable carrier boards, it can use the PMC+ link and serial port connections for low-latency, tightly-coupled I/O.

MM-7105 PMC Virtex-4 FPGA: (from Curtiss-Wright Controls, Inc.)
In terms of logic resources, the MM-7105 is one of the most powerful FPGA processing engines ever to be offered on the PMC form factor. Utilizing Xilinx's largest Virtex-4 FPGA, the LX200, the MM-7105 addresses the most demanding signal processing requirements in a modular, flexible PMC form factor.

The MM-7105 can be utilized on PowerPC and x86 Single Board Computers, Altivec DSP boards, A/D converters, graphic engines or any carrier that has a PCI Mezzanine Card (PMC) site. The MM-7105 module's primary bus that interfaces to the host system is located in the LX200 FPGA. This PCI/PCI-X bus provides a data transfer, communication and control plane to the rest of the system. It supports 32-bit and 64-bit PCI transfers at 33MHz/66MHz, or 64-bit PCI-X transfers at 66MHz/133MHz, and is compliant with the with IEEE P1386/P1386.1 CMC/PMC draft standard and ANSI/VITA 20-2001 (R2005).

PMC-FPGA05 Virtex-5 LX110 based PMC: (from Curtiss-Wright Controls, Inc.)
The PMC-FPGA05 Kit is a Xilinx® Virtex™-5 XC5VLX110 platform FPGA based, PMC card with high speed digital I/O and PCI-X interface to the host computer.

Xilinx Virtex-5 FPGA The new generation of platform FPGA supports logic gates with hard-wired functionality, including high-speed serial communications and DSP multipliers, making them ideal for a wide range of reconfigurable computing applications. The PMC-FPGA05 enhances the processing power and flexibility of the Virtex-5 XC5VLX110 FPGA with large, independent pools of memory, a wide range of I/O possibilities and a comprehensive board support package.

Reef-PMC+: (from BittWare, Inc.)
Reconfigurable FPGA card with ADSP-21160. BittWare´s Reef-PMC+ (RFPM) is a reconfigurable FPGA board combining the power of the XILINX Virtex-II FPGA and the Analog Devices ADSP-21160 SHARC® DSP. Configurable for nearly any application, the RFPM allows system designers to take advantage of both the flexibility of a reconfigurable FPGA and the processing power of a general-purpose DSP. The Virtex-II features up to 1 million system gates, a flexible digital I/O interface, and reconfigurable computing blocks. And the ADSP-21160 DSP provides additional I/O and processing power for the board. Rounding out the RFPM´s feature set are a 64/66 PCI interface, a 64-512 MB bank of SDRAM, and 2 MB of Flash memory. The Virtex-II reconfigurable FPGA from XILINX is a powerful tool for designing custom digital interfaces based on IP cores and customized modules. The RFPM features a flexible digital I/O interface that provides up to 140 user I/O pins, each of which is individually configurable for any of nineteen single-ended I/O standards and six differential I/O standards, including LVDS, SSTL, HSTL II, and GTL+. Any two I/O pins can be used as a differential pair, providing maximum board layout flexibility. The Virtex-II is configured on power-up by the host or an on-board EPROM, and it supports reconfiguration “on-the-fly” from either the host or the ADSP-21160 DSP.

SPMC/DPMC-440 ProWare FPGA: (from Curtiss-Wright Controls, Inc.)
The PMC-440 ProWare PMC module provides systems integrators with a powerful, easy-to-use means to capture EO/IR and radar inputs, interface to legacy system elements, and perform sensor data pre-processing. The ProWare module offers flexibility with its choice of I/O options that include LVDS, LVTTL, and RocketIO. Ease-of-use is provided via a comprehensive ProWare Design Kit (PDK) that includes a library of IP modules, simulation testbench files, a reference design, and full documentation.

T2-PMC: (from BittWare, Inc.)
BittWare´s T2-PMC (T2PM) DSP board features the ADSP-TS201 TigerSHARC processor from Analog Devices. To take full advantage of this high-performance DSP, this multiprocessor PCI Mezzanine Card (PMC) implements BittWare´s ATLANTiS (Advanced Transfer Link Architecture for New TigerSHARC) architecture, which combines robust TigerSHARC processing with the versatile Virtex-II Pro FPGA from Xilinx to offer ultra high performance and unprecedented I/O bandwidth. The T2PM matches a cluster of four ADSP-TS201 TigerSHARCs with: (1) High-bandwidth, low-latency off-board I/O, reconfigurable for nearly any application (2) High-speed interprocessor communication network to facilitate scalability (3) SharcFIN PCI-DSP bridge for integrating DSPs with PCI bus and other peripherals (4) Comprehensive software for ease-of-use. The board also provides a large on-board bank of SDRAM and flash memory for hostless boot.

Tiger-PMC: (from BittWare, Inc.)
The TSPM´s four ADSP-TS101S TigerSHARC DSPs share a common 83.3 MHz local bus, which also provides access to the SDRAM and SharcFIN ASIC. Each TigerSHARC provides 12 Gbytes/sec of internal memory bandwidth and features 6 Mbits of on-chip SRAM. It supports both fixed and floating point operation, providing 1500 MFLOPS of processing power for 32-bit floating point operations and 6 GOPS for 16-bit fixed point operations. Providing the backbone of the TSPM´s architecture is BittWare´s SharcFIN for the ADSP-TS101S. The SharcFIN features a comprehensive set of bus interfaces and peripherals for the ADSP-TS101S DSPs and provides a clean board-level implementation. It integrates a full 64-bit 66 MHz master PCI interface, an extensive flag and interrupt multiplexer, and a peripheral bus that interfaces the DSPs to peripherals such as the Flash memory. I/O interfaces on the TSPM include the PMC+ interface and four front-panel external link ports. The PMC+ interface consists of four connectors: three standard PMC connectors to provide the PCI interface and an additional PMC+ connector that provides four 250 Mbytes/sec link ports from the ADSP-TS101S DSPs to the carrier board. The TSPM attaches to any PMC capable carrier board, and when attached to one of BittWare´s PMC+ capable carrier boards, it can use the PMC+ link port connections for low-latency, tightly-coupled I/O.

TPMC630-10: (from TEWS TECHNOLGIES GmbH)
Reconfigurable FPGA with 64 TTL I/O Lines; PCI Target Controller (PCI9030) with user configurable FPGA (300000 system gates: Xilinx XC2S300E-6); FPGA development tool: Free Xilinx ISE WebPack; FPGA configuration by in system programmable FlashProm via PCI bus; several clock options by programmable clock generator; 64 digital TTL I/O lines; All I/O lines on HD68 SCSI-3 type connector in front panel and on P14; PCI I/O signaling voltage 3.3V and 5V; Operating temperature -40°C to +85°C

TPMC630-11: (from TEWS TECHNOLGIES GmbH)
Reconfigurable FPGA with 32 differential I/O Lines; PCI Target Controller (PCI9030) with user configurable FPGA (300000 system gates: Xilinx XC2S300E-6); FPGA development tool: Free Xilinx ISE WebPack; FPGA configuration by in system programmable FlashProm via PCI bus; several clock options by programmable clock generator; 32 differential I/O lines with on board termination; All I/O lines on HD68 SCSI-3 type connector in front panel and on P14; PCI I/O signaling voltage 3.3V and 5V; Operating temperature -40°C to +85°C

TPMC630-12: (from TEWS TECHNOLGIES GmbH)
Reconfigurable FPGA with 32 TTL I/O Lines and 16 differential I/O Lines; PCI Target Controller (PCI9030) with user configurable FPGA (300000 system gates: Xilinx XC2S300E-6); FPGA development tool: Free Xilinx ISE WebPack; FPGA configuration by in system programmable FlashProm via PCI bus; several clock options by programmable clock generator; 32 digital TTL I/O lines and 16 differential I/O lines with on board termination; All I/O lines on HD68 SCSI-3 type connector in front panel and on P14; PCI I/O signaling voltage 3.3V and 5V; Operating temperature -40°C to +85°C: Xilinx Virtex based reconfigurable computer. Leverages rapid hardware integration of a wide range of DSP cores including FFTs and FIRs supporting applications equivalent to 160 billion MACs. <BR>Range of Virtex/E/EM FPGAs from 400K to 2000K gates, with 4 independent banks of 256k x 36 SSRAM, programmable clocks, flash memory, IO connector and SDK for WinNT/2000/XP, linux and VxWorks.
ADM-XRC-II: (from Alpha Data)
Xilinx Virtex-II based reconfigurable computer. Leverages rapid hardware integration of a wide range of DSP cores available from Alpha Data and third parties. Capable of up to 600 billion MACs per second DSP performance. Support for Matlab/Simulink with common API and drivers for WinNT, Win2000, linux and VxWorks.

Hammerhead-PMC: (from BittWare, Inc.)
The HHPM incorporates BittWare's SharcFIN ASIC, which flexibly interfaces the 21160 DSPs to the 64-bit, 66 MHz PCI bus, the SDRAM, the FLASH memory, and a peripheral bus. It also provides a feature-rich set of DMA functions and interrupt options to support very high-speed, real-time data flow with minimum processor overhead. The HHPM is configured with four 80 MHz ADSP-21160 processors, each with 4 Mbits of dual-ported, on-chip SRAM. The ADSP-21160 DSPs are code-compatible with the ADSP-2106x SHARC DSPs, making it easier to integrate existing code. The four ADSP-21160 processors share a common 40 MHz, 64-bit processor bus, which gives them access to the board´s SDRAM, the PCI bus interface, and the other three SHARCs. For additional I/O, each processor also has four flags, three interrupts, six link ports, and two serial ports. The PMC+ interface consists of four connectors: three standard PMC connectors to provide the PCI interface and an additional PMC+ connector that provides four 80 MB/s link ports and a serial TDM bus from the ADSP-21160 DSPs to the carrier board. The Hammerhead-PMC+ attaches to any PMC-capable carrier board, and when attached to one of BittWare's PMC+ capable carrier boards, it can use the PMC+ link and serial port connections for low-latency, tightly-coupled I/O.

MM-7105 PMC Virtex-4 FPGA: (from Curtiss-Wright Controls, Inc.)
In terms of logic resources, the MM-7105 is one of the most powerful FPGA processing engines ever to be offered on the PMC form factor. Utilizing Xilinx's largest Virtex-4 FPGA, the LX200, the MM-7105 addresses the most demanding signal processing requirements in a modular, flexible PMC form factor.

The MM-7105 can be utilized on PowerPC and x86 Single Board Computers, Altivec DSP boards, A/D converters, graphic engines or any carrier that has a PCI Mezzanine Card (PMC) site. The MM-7105 module's primary bus that interfaces to the host system is located in the LX200 FPGA. This PCI/PCI-X bus provides a data transfer, communication and control plane to the rest of the system. It supports 32-bit and 64-bit PCI transfers at 33MHz/66MHz, or 64-bit PCI-X transfers at 66MHz/133MHz, and is compliant with the with IEEE P1386/P1386.1 CMC/PMC draft standard and ANSI/VITA 20-2001 (R2005).

PMC-FPGA05 Virtex-5 LX110 based PMC: (from Curtiss-Wright Controls, Inc.)
The PMC-FPGA05 Kit is a Xilinx® Virtex™-5 XC5VLX110 platform FPGA based, PMC card with high speed digital I/O and PCI-X interface to the host computer.

Xilinx Virtex-5 FPGA The new generation of platform FPGA supports logic gates with hard-wired functionality, including high-speed serial communications and DSP multipliers, making them ideal for a wide range of reconfigurable computing applications. The PMC-FPGA05 enhances the processing power and flexibility of the Virtex-5 XC5VLX110 FPGA with large, independent pools of memory, a wide range of I/O possibilities and a comprehensive board support package.

Reef-PMC+: (from BittWare, Inc.)
Reconfigurable FPGA card with ADSP-21160. BittWare´s Reef-PMC+ (RFPM) is a reconfigurable FPGA board combining the power of the XILINX Virtex-II FPGA and the Analog Devices ADSP-21160 SHARC® DSP. Configurable for nearly any application, the RFPM allows system designers to take advantage of both the flexibility of a reconfigurable FPGA and the processing power of a general-purpose DSP. The Virtex-II features up to 1 million system gates, a flexible digital I/O interface, and reconfigurable computing blocks. And the ADSP-21160 DSP provides additional I/O and processing power for the board. Rounding out the RFPM´s feature set are a 64/66 PCI interface, a 64-512 MB bank of SDRAM, and 2 MB of Flash memory. The Virtex-II reconfigurable FPGA from XILINX is a powerful tool for designing custom digital interfaces based on IP cores and customized modules. The RFPM features a flexible digital I/O interface that provides up to 140 user I/O pins, each of which is individually configurable for any of nineteen single-ended I/O standards and six differential I/O standards, including LVDS, SSTL, HSTL II, and GTL+. Any two I/O pins can be used as a differential pair, providing maximum board layout flexibility. The Virtex-II is configured on power-up by the host or an on-board EPROM, and it supports reconfiguration “on-the-fly” from either the host or the ADSP-21160 DSP.

SPMC/DPMC-440 ProWare FPGA: (from Curtiss-Wright Controls, Inc.)
The PMC-440 ProWare PMC module provides systems integrators with a powerful, easy-to-use means to capture EO/IR and radar inputs, interface to legacy system elements, and perform sensor data pre-processing. The ProWare module offers flexibility with its choice of I/O options that include LVDS, LVTTL, and RocketIO. Ease-of-use is provided via a comprehensive ProWare Design Kit (PDK) that includes a library of IP modules, simulation testbench files, a reference design, and full documentation.

T2-PMC: (from BittWare, Inc.)
BittWare´s T2-PMC (T2PM) DSP board features the ADSP-TS201 TigerSHARC processor from Analog Devices. To take full advantage of this high-performance DSP, this multiprocessor PCI Mezzanine Card (PMC) implements BittWare´s ATLANTiS (Advanced Transfer Link Architecture for New TigerSHARC) architecture, which combines robust TigerSHARC processing with the versatile Virtex-II Pro FPGA from Xilinx to offer ultra high performance and unprecedented I/O bandwidth. The T2PM matches a cluster of four ADSP-TS201 TigerSHARCs with: (1) High-bandwidth, low-latency off-board I/O, reconfigurable for nearly any application (2) High-speed interprocessor communication network to facilitate scalability (3) SharcFIN PCI-DSP bridge for integrating DSPs with PCI bus and other peripherals (4) Comprehensive software for ease-of-use. The board also provides a large on-board bank of SDRAM and flash memory for hostless boot.

Tiger-PMC: (from BittWare, Inc.)
The TSPM´s four ADSP-TS101S TigerSHARC DSPs share a common 83.3 MHz local bus, which also provides access to the SDRAM and SharcFIN ASIC. Each TigerSHARC provides 12 Gbytes/sec of internal memory bandwidth and features 6 Mbits of on-chip SRAM. It supports both fixed and floating point operation, providing 1500 MFLOPS of processing power for 32-bit floating point operations and 6 GOPS for 16-bit fixed point operations. Providing the backbone of the TSPM´s architecture is BittWare´s SharcFIN for the ADSP-TS101S. The SharcFIN features a comprehensive set of bus interfaces and peripherals for the ADSP-TS101S DSPs and provides a clean board-level implementation. It integrates a full 64-bit 66 MHz master PCI interface, an extensive flag and interrupt multiplexer, and a peripheral bus that interfaces the DSPs to peripherals such as the Flash memory. I/O interfaces on the TSPM include the PMC+ interface and four front-panel external link ports. The PMC+ interface consists of four connectors: three standard PMC connectors to provide the PCI interface and an additional PMC+ connector that provides four 250 Mbytes/sec link ports from the ADSP-TS101S DSPs to the carrier board. The TSPM attaches to any PMC capable carrier board, and when attached to one of BittWare´s PMC+ capable carrier boards, it can use the PMC+ link port connections for low-latency, tightly-coupled I/O.

TPMC630-10: (from TEWS TECHNOLGIES GmbH)
Reconfigurable FPGA with 64 TTL I/O Lines; PCI Target Controller (PCI9030) with user configurable FPGA (300000 system gates: Xilinx XC2S300E-6); FPGA development tool: Free Xilinx ISE WebPack; FPGA configuration by in system programmable FlashProm via PCI bus; several clock options by programmable clock generator; 64 digital TTL I/O lines; All I/O lines on HD68 SCSI-3 type connector in front panel and on P14; PCI I/O signaling voltage 3.3V and 5V; Operating temperature -40°C to +85°C

TPMC630-11: (from TEWS TECHNOLGIES GmbH)
Reconfigurable FPGA with 32 differential I/O Lines; PCI Target Controller (PCI9030) with user configurable FPGA (300000 system gates: Xilinx XC2S300E-6); FPGA development tool: Free Xilinx ISE WebPack; FPGA configuration by in system programmable FlashProm via PCI bus; several clock options by programmable clock generator; 32 differential I/O lines with on board termination; All I/O lines on HD68 SCSI-3 type connector in front panel and on P14; PCI I/O signaling voltage 3.3V and 5V; Operating temperature -40°C to +85°C

TPMC630-12: (from TEWS TECHNOLGIES GmbH)
Reconfigurable FPGA with 32 TTL I/O Lines and 16 differential I/O Lines; PCI Target Controller (PCI9030) with user configurable FPGA (300000 system gates: Xilinx XC2S300E-6); FPGA development tool: Free Xilinx ISE WebPack; FPGA configuration by in system programmable FlashProm via PCI bus; several clock options by programmable clock generator; 32 digital TTL I/O lines and 16 differential I/O lines with on board termination; All I/O lines on HD68 SCSI-3 type connector in front panel and on P14; PCI I/O signaling voltage 3.3V and 5V; Operating temperature -40°C to +85°C: Xilinx Virtex-II based reconfigurable computer. Leverages rapid hardware integration of a wide range of DSP cores available from Alpha Data and third parties. Capable of up to 600 billion MACs per second DSP performance. Support for Matlab/Simulink with common API and drivers for WinNT, Win2000, linux and VxWorks.
Hammerhead-PMC: (from BittWare, Inc.)
The HHPM incorporates BittWare's SharcFIN ASIC, which flexibly interfaces the 21160 DSPs to the 64-bit, 66 MHz PCI bus, the SDRAM, the FLASH memory, and a peripheral bus. It also provides a feature-rich set of DMA functions and interrupt options to support very high-speed, real-time data flow with minimum processor overhead. The HHPM is configured with four 80 MHz ADSP-21160 processors, each with 4 Mbits of dual-ported, on-chip SRAM. The ADSP-21160 DSPs are code-compatible with the ADSP-2106x SHARC DSPs, making it easier to integrate existing code. The four ADSP-21160 processors share a common 40 MHz, 64-bit processor bus, which gives them access to the board´s SDRAM, the PCI bus interface, and the other three SHARCs. For additional I/O, each processor also has four flags, three interrupts, six link ports, and two serial ports. The PMC+ interface consists of four connectors: three standard PMC connectors to provide the PCI interface and an additional PMC+ connector that provides four 80 MB/s link ports and a serial TDM bus from the ADSP-21160 DSPs to the carrier board. The Hammerhead-PMC+ attaches to any PMC-capable carrier board, and when attached to one of BittWare's PMC+ capable carrier boards, it can use the PMC+ link and serial port connections for low-latency, tightly-coupled I/O.

MM-7105 PMC Virtex-4 FPGA: (from Curtiss-Wright Controls, Inc.)
In terms of logic resources, the MM-7105 is one of the most powerful FPGA processing engines ever to be offered on the PMC form factor. Utilizing Xilinx's largest Virtex-4 FPGA, the LX200, the MM-7105 addresses the most demanding signal processing requirements in a modular, flexible PMC form factor.

The MM-7105 can be utilized on PowerPC and x86 Single Board Computers, Altivec DSP boards, A/D converters, graphic engines or any carrier that has a PCI Mezzanine Card (PMC) site. The MM-7105 module's primary bus that interfaces to the host system is located in the LX200 FPGA. This PCI/PCI-X bus provides a data transfer, communication and control plane to the rest of the system. It supports 32-bit and 64-bit PCI transfers at 33MHz/66MHz, or 64-bit PCI-X transfers at 66MHz/133MHz, and is compliant with the with IEEE P1386/P1386.1 CMC/PMC draft standard and ANSI/VITA 20-2001 (R2005).

PMC-FPGA05 Virtex-5 LX110 based PMC: (from Curtiss-Wright Controls, Inc.)
The PMC-FPGA05 Kit is a Xilinx® Virtex™-5 XC5VLX110 platform FPGA based, PMC card with high speed digital I/O and PCI-X interface to the host computer.

Xilinx Virtex-5 FPGA The new generation of platform FPGA supports logic gates with hard-wired functionality, including high-speed serial communications and DSP multipliers, making them ideal for a wide range of reconfigurable computing applications. The PMC-FPGA05 enhances the processing power and flexibility of the Virtex-5 XC5VLX110 FPGA with large, independent pools of memory, a wide range of I/O possibilities and a comprehensive board support package.

Reef-PMC+: (from BittWare, Inc.)
Reconfigurable FPGA card with ADSP-21160. BittWare´s Reef-PMC+ (RFPM) is a reconfigurable FPGA board combining the power of the XILINX Virtex-II FPGA and the Analog Devices ADSP-21160 SHARC® DSP. Configurable for nearly any application, the RFPM allows system designers to take advantage of both the flexibility of a reconfigurable FPGA and the processing power of a general-purpose DSP. The Virtex-II features up to 1 million system gates, a flexible digital I/O interface, and reconfigurable computing blocks. And the ADSP-21160 DSP provides additional I/O and processing power for the board. Rounding out the RFPM´s feature set are a 64/66 PCI interface, a 64-512 MB bank of SDRAM, and 2 MB of Flash memory. The Virtex-II reconfigurable FPGA from XILINX is a powerful tool for designing custom digital interfaces based on IP cores and customized modules. The RFPM features a flexible digital I/O interface that provides up to 140 user I/O pins, each of which is individually configurable for any of nineteen single-ended I/O standards and six differential I/O standards, including LVDS, SSTL, HSTL II, and GTL+. Any two I/O pins can be used as a differential pair, providing maximum board layout flexibility. The Virtex-II is configured on power-up by the host or an on-board EPROM, and it supports reconfiguration “on-the-fly” from either the host or the ADSP-21160 DSP.

SPMC/DPMC-440 ProWare FPGA: (from Curtiss-Wright Controls, Inc.)
The PMC-440 ProWare PMC module provides systems integrators with a powerful, easy-to-use means to capture EO/IR and radar inputs, interface to legacy system elements, and perform sensor data pre-processing. The ProWare module offers flexibility with its choice of I/O options that include LVDS, LVTTL, and RocketIO. Ease-of-use is provided via a comprehensive ProWare Design Kit (PDK) that includes a library of IP modules, simulation testbench files, a reference design, and full documentation.

T2-PMC: (from BittWare, Inc.)
BittWare´s T2-PMC (T2PM) DSP board features the ADSP-TS201 TigerSHARC processor from Analog Devices. To take full advantage of this high-performance DSP, this multiprocessor PCI Mezzanine Card (PMC) implements BittWare´s ATLANTiS (Advanced Transfer Link Architecture for New TigerSHARC) architecture, which combines robust TigerSHARC processing with the versatile Virtex-II Pro FPGA from Xilinx to offer ultra high performance and unprecedented I/O bandwidth. The T2PM matches a cluster of four ADSP-TS201 TigerSHARCs with: (1) High-bandwidth, low-latency off-board I/O, reconfigurable for nearly any application (2) High-speed interprocessor communication network to facilitate scalability (3) SharcFIN PCI-DSP bridge for integrating DSPs with PCI bus and other peripherals (4) Comprehensive software for ease-of-use. The board also provides a large on-board bank of SDRAM and flash memory for hostless boot.

Tiger-PMC: (from BittWare, Inc.)
The TSPM´s four ADSP-TS101S TigerSHARC DSPs share a common 83.3 MHz local bus, which also provides access to the SDRAM and SharcFIN ASIC. Each TigerSHARC provides 12 Gbytes/sec of internal memory bandwidth and features 6 Mbits of on-chip SRAM. It supports both fixed and floating point operation, providing 1500 MFLOPS of processing power for 32-bit floating point operations and 6 GOPS for 16-bit fixed point operations. Providing the backbone of the TSPM´s architecture is BittWare´s SharcFIN for the ADSP-TS101S. The SharcFIN features a comprehensive set of bus interfaces and peripherals for the ADSP-TS101S DSPs and provides a clean board-level implementation. It integrates a full 64-bit 66 MHz master PCI interface, an extensive flag and interrupt multiplexer, and a peripheral bus that interfaces the DSPs to peripherals such as the Flash memory. I/O interfaces on the TSPM include the PMC+ interface and four front-panel external link ports. The PMC+ interface consists of four connectors: three standard PMC connectors to provide the PCI interface and an additional PMC+ connector that provides four 250 Mbytes/sec link ports from the ADSP-TS101S DSPs to the carrier board. The TSPM attaches to any PMC capable carrier board, and when attached to one of BittWare´s PMC+ capable carrier boards, it can use the PMC+ link port connections for low-latency, tightly-coupled I/O.

TPMC630-10: (from TEWS TECHNOLGIES GmbH)
Reconfigurable FPGA with 64 TTL I/O Lines; PCI Target Controller (PCI9030) with user configurable FPGA (300000 system gates: Xilinx XC2S300E-6); FPGA development tool: Free Xilinx ISE WebPack; FPGA configuration by in system programmable FlashProm via PCI bus; several clock options by programmable clock generator; 64 digital TTL I/O lines; All I/O lines on HD68 SCSI-3 type connector in front panel and on P14; PCI I/O signaling voltage 3.3V and 5V; Operating temperature -40°C to +85°C

TPMC630-11: (from TEWS TECHNOLGIES GmbH)
Reconfigurable FPGA with 32 differential I/O Lines; PCI Target Controller (PCI9030) with user configurable FPGA (300000 system gates: Xilinx XC2S300E-6); FPGA development tool: Free Xilinx ISE WebPack; FPGA configuration by in system programmable FlashProm via PCI bus; several clock options by programmable clock generator; 32 differential I/O lines with on board termination; All I/O lines on HD68 SCSI-3 type connector in front panel and on P14; PCI I/O signaling voltage 3.3V and 5V; Operating temperature -40°C to +85°C

TPMC630-12: (from TEWS TECHNOLGIES GmbH)
Reconfigurable FPGA with 32 TTL I/O Lines and 16 differential I/O Lines; PCI Target Controller (PCI9030) with user configurable FPGA (300000 system gates: Xilinx XC2S300E-6); FPGA development tool: Free Xilinx ISE WebPack; FPGA configuration by in system programmable FlashProm via PCI bus; several clock options by programmable clock generator; 32 digital TTL I/O lines and 16 differential I/O lines with on board termination; All I/O lines on HD68 SCSI-3 type connector in front panel and on P14; PCI I/O signaling voltage 3.3V and 5V; Operating temperature -40°C to +85°C: The HHPM incorporates BittWare's SharcFIN ASIC, which flexibly interfaces the 21160 DSPs to the 64-bit, 66 MHz PCI bus, the SDRAM, the FLASH memory, and a peripheral bus. It also provides a feature-rich set of DMA functions and interrupt options to support very high-speed, real-time data flow with minimum processor overhead. The HHPM is configured with four 80 MHz ADSP-21160 processors, each with 4 Mbits of dual-ported, on-chip SRAM. The ADSP-21160 DSPs are code-compatible with the ADSP-2106x SHARC DSPs, making it easier to integrate existing code. The four ADSP-21160 processors share a common 40 MHz, 64-bit processor bus, which gives them access to the board´s SDRAM, the PCI bus interface, and the other three SHARCs. For additional I/O, each processor also has four flags, three interrupts, six link ports, and two serial ports. The PMC+ interface consists of four connectors: three standard PMC connectors to provide the PCI interface and an additional PMC+ connector that provides four 80 MB/s link ports and a serial TDM bus from the ADSP-21160 DSPs to the carrier board. The Hammerhead-PMC+ attaches to any PMC-capable carrier board, and when attached to one of BittWare's PMC+ capable carrier boards, it can use the PMC+ link and serial port connections for low-latency, tightly-coupled I/O.
MM-7105 PMC Virtex-4 FPGA: (from Curtiss-Wright Controls, Inc.)
In terms of logic resources, the MM-7105 is one of the most powerful FPGA processing engines ever to be offered on the PMC form factor. Utilizing Xilinx's largest Virtex-4 FPGA, the LX200, the MM-7105 addresses the most demanding signal processing requirements in a modular, flexible PMC form factor.

The MM-7105 can be utilized on PowerPC and x86 Single Board Computers, Altivec DSP boards, A/D converters, graphic engines or any carrier that has a PCI Mezzanine Card (PMC) site. The MM-7105 module's primary bus that interfaces to the host system is located in the LX200 FPGA. This PCI/PCI-X bus provides a data transfer, communication and control plane to the rest of the system. It supports 32-bit and 64-bit PCI transfers at 33MHz/66MHz, or 64-bit PCI-X transfers at 66MHz/133MHz, and is compliant with the with IEEE P1386/P1386.1 CMC/PMC draft standard and ANSI/VITA 20-2001 (R2005).

PMC-FPGA05 Virtex-5 LX110 based PMC: (from Curtiss-Wright Controls, Inc.)
The PMC-FPGA05 Kit is a Xilinx® Virtex™-5 XC5VLX110 platform FPGA based, PMC card with high speed digital I/O and PCI-X interface to the host computer.

Xilinx Virtex-5 FPGA The new generation of platform FPGA supports logic gates with hard-wired functionality, including high-speed serial communications and DSP multipliers, making them ideal for a wide range of reconfigurable computing applications. The PMC-FPGA05 enhances the processing power and flexibility of the Virtex-5 XC5VLX110 FPGA with large, independent pools of memory, a wide range of I/O possibilities and a comprehensive board support package.

Reef-PMC+: (from BittWare, Inc.)
Reconfigurable FPGA card with ADSP-21160. BittWare´s Reef-PMC+ (RFPM) is a reconfigurable FPGA board combining the power of the XILINX Virtex-II FPGA and the Analog Devices ADSP-21160 SHARC® DSP. Configurable for nearly any application, the RFPM allows system designers to take advantage of both the flexibility of a reconfigurable FPGA and the processing power of a general-purpose DSP. The Virtex-II features up to 1 million system gates, a flexible digital I/O interface, and reconfigurable computing blocks. And the ADSP-21160 DSP provides additional I/O and processing power for the board. Rounding out the RFPM´s feature set are a 64/66 PCI interface, a 64-512 MB bank of SDRAM, and 2 MB of Flash memory. The Virtex-II reconfigurable FPGA from XILINX is a powerful tool for designing custom digital interfaces based on IP cores and customized modules. The RFPM features a flexible digital I/O interface that provides up to 140 user I/O pins, each of which is individually configurable for any of nineteen single-ended I/O standards and six differential I/O standards, including LVDS, SSTL, HSTL II, and GTL+. Any two I/O pins can be used as a differential pair, providing maximum board layout flexibility. The Virtex-II is configured on power-up by the host or an on-board EPROM, and it supports reconfiguration “on-the-fly” from either the host or the ADSP-21160 DSP.

SPMC/DPMC-440 ProWare FPGA: (from Curtiss-Wright Controls, Inc.)
The PMC-440 ProWare PMC module provides systems integrators with a powerful, easy-to-use means to capture EO/IR and radar inputs, interface to legacy system elements, and perform sensor data pre-processing. The ProWare module offers flexibility with its choice of I/O options that include LVDS, LVTTL, and RocketIO. Ease-of-use is provided via a comprehensive ProWare Design Kit (PDK) that includes a library of IP modules, simulation testbench files, a reference design, and full documentation.

T2-PMC: (from BittWare, Inc.)
BittWare´s T2-PMC (T2PM) DSP board features the ADSP-TS201 TigerSHARC processor from Analog Devices. To take full advantage of this high-performance DSP, this multiprocessor PCI Mezzanine Card (PMC) implements BittWare´s ATLANTiS (Advanced Transfer Link Architecture for New TigerSHARC) architecture, which combines robust TigerSHARC processing with the versatile Virtex-II Pro FPGA from Xilinx to offer ultra high performance and unprecedented I/O bandwidth. The T2PM matches a cluster of four ADSP-TS201 TigerSHARCs with: (1) High-bandwidth, low-latency off-board I/O, reconfigurable for nearly any application (2) High-speed interprocessor communication network to facilitate scalability (3) SharcFIN PCI-DSP bridge for integrating DSPs with PCI bus and other peripherals (4) Comprehensive software for ease-of-use. The board also provides a large on-board bank of SDRAM and flash memory for hostless boot.

Tiger-PMC: (from BittWare, Inc.)
The TSPM´s four ADSP-TS101S TigerSHARC DSPs share a common 83.3 MHz local bus, which also provides access to the SDRAM and SharcFIN ASIC. Each TigerSHARC provides 12 Gbytes/sec of internal memory bandwidth and features 6 Mbits of on-chip SRAM. It supports both fixed and floating point operation, providing 1500 MFLOPS of processing power for 32-bit floating point operations and 6 GOPS for 16-bit fixed point operations. Providing the backbone of the TSPM´s architecture is BittWare´s SharcFIN for the ADSP-TS101S. The SharcFIN features a comprehensive set of bus interfaces and peripherals for the ADSP-TS101S DSPs and provides a clean board-level implementation. It integrates a full 64-bit 66 MHz master PCI interface, an extensive flag and interrupt multiplexer, and a peripheral bus that interfaces the DSPs to peripherals such as the Flash memory. I/O interfaces on the TSPM include the PMC+ interface and four front-panel external link ports. The PMC+ interface consists of four connectors: three standard PMC connectors to provide the PCI interface and an additional PMC+ connector that provides four 250 Mbytes/sec link ports from the ADSP-TS101S DSPs to the carrier board. The TSPM attaches to any PMC capable carrier board, and when attached to one of BittWare´s PMC+ capable carrier boards, it can use the PMC+ link port connections for low-latency, tightly-coupled I/O.

TPMC630-10: (from TEWS TECHNOLGIES GmbH)
Reconfigurable FPGA with 64 TTL I/O Lines; PCI Target Controller (PCI9030) with user configurable FPGA (300000 system gates: Xilinx XC2S300E-6); FPGA development tool: Free Xilinx ISE WebPack; FPGA configuration by in system programmable FlashProm via PCI bus; several clock options by programmable clock generator; 64 digital TTL I/O lines; All I/O lines on HD68 SCSI-3 type connector in front panel and on P14; PCI I/O signaling voltage 3.3V and 5V; Operating temperature -40°C to +85°C

TPMC630-11: (from TEWS TECHNOLGIES GmbH)
Reconfigurable FPGA with 32 differential I/O Lines; PCI Target Controller (PCI9030) with user configurable FPGA (300000 system gates: Xilinx XC2S300E-6); FPGA development tool: Free Xilinx ISE WebPack; FPGA configuration by in system programmable FlashProm via PCI bus; several clock options by programmable clock generator; 32 differential I/O lines with on board termination; All I/O lines on HD68 SCSI-3 type connector in front panel and on P14; PCI I/O signaling voltage 3.3V and 5V; Operating temperature -40°C to +85°C

TPMC630-12: (from TEWS TECHNOLGIES GmbH)
Reconfigurable FPGA with 32 TTL I/O Lines and 16 differential I/O Lines; PCI Target Controller (PCI9030) with user configurable FPGA (300000 system gates: Xilinx XC2S300E-6); FPGA development tool: Free Xilinx ISE WebPack; FPGA configuration by in system programmable FlashProm via PCI bus; several clock options by programmable clock generator; 32 digital TTL I/O lines and 16 differential I/O lines with on board termination; All I/O lines on HD68 SCSI-3 type connector in front panel and on P14; PCI I/O signaling voltage 3.3V and 5V; Operating temperature -40°C to +85°C: In terms of logic resources, the MM-7105 is one of the most powerful FPGA processing engines ever to be offered on the PMC form factor. Utilizing Xilinx's largest Virtex-4 FPGA, the LX200, the MM-7105 addresses the most demanding signal processing requirements in a modular, flexible PMC form factor.

The MM-7105 can be utilized on PowerPC and x86 Single Board Computers, Altivec DSP boards, A/D converters, graphic engines or any carrier that has a PCI Mezzanine Card (PMC) site. The MM-7105 module's primary bus that interfaces to the host system is located in the LX200 FPGA. This PCI/PCI-X bus provides a data transfer, communication and control plane to the rest of the system. It supports 32-bit and 64-bit PCI transfers at 33MHz/66MHz, or 64-bit PCI-X transfers at 66MHz/133MHz, and is compliant with the with IEEE P1386/P1386.1 CMC/PMC draft standard and ANSI/VITA 20-2001 (R2005).
PMC-FPGA05 Virtex-5 LX110 based PMC: (from Curtiss-Wright Controls, Inc.)
The PMC-FPGA05 Kit is a Xilinx® Virtex™-5 XC5VLX110 platform FPGA based, PMC card with high speed digital I/O and PCI-X interface to the host computer.

Xilinx Virtex-5 FPGA The new generation of platform FPGA supports logic gates with hard-wired functionality, including high-speed serial communications and DSP multipliers, making them ideal for a wide range of reconfigurable computing applications. The PMC-FPGA05 enhances the processing power and flexibility of the Virtex-5 XC5VLX110 FPGA with large, independent pools of memory, a wide range of I/O possibilities and a comprehensive board support package.

Reef-PMC+: (from BittWare, Inc.)
Reconfigurable FPGA card with ADSP-21160. BittWare´s Reef-PMC+ (RFPM) is a reconfigurable FPGA board combining the power of the XILINX Virtex-II FPGA and the Analog Devices ADSP-21160 SHARC® DSP. Configurable for nearly any application, the RFPM allows system designers to take advantage of both the flexibility of a reconfigurable FPGA and the processing power of a general-purpose DSP. The Virtex-II features up to 1 million system gates, a flexible digital I/O interface, and reconfigurable computing blocks. And the ADSP-21160 DSP provides additional I/O and processing power for the board. Rounding out the RFPM´s feature set are a 64/66 PCI interface, a 64-512 MB bank of SDRAM, and 2 MB of Flash memory. The Virtex-II reconfigurable FPGA from XILINX is a powerful tool for designing custom digital interfaces based on IP cores and customized modules. The RFPM features a flexible digital I/O interface that provides up to 140 user I/O pins, each of which is individually configurable for any of nineteen single-ended I/O standards and six differential I/O standards, including LVDS, SSTL, HSTL II, and GTL+. Any two I/O pins can be used as a differential pair, providing maximum board layout flexibility. The Virtex-II is configured on power-up by the host or an on-board EPROM, and it supports reconfiguration “on-the-fly” from either the host or the ADSP-21160 DSP.

SPMC/DPMC-440 ProWare FPGA: (from Curtiss-Wright Controls, Inc.)
The PMC-440 ProWare PMC module provides systems integrators with a powerful, easy-to-use means to capture EO/IR and radar inputs, interface to legacy system elements, and perform sensor data pre-processing. The ProWare module offers flexibility with its choice of I/O options that include LVDS, LVTTL, and RocketIO. Ease-of-use is provided via a comprehensive ProWare Design Kit (PDK) that includes a library of IP modules, simulation testbench files, a reference design, and full documentation.

T2-PMC: (from BittWare, Inc.)
BittWare´s T2-PMC (T2PM) DSP board features the ADSP-TS201 TigerSHARC processor from Analog Devices. To take full advantage of this high-performance DSP, this multiprocessor PCI Mezzanine Card (PMC) implements BittWare´s ATLANTiS (Advanced Transfer Link Architecture for New TigerSHARC) architecture, which combines robust TigerSHARC processing with the versatile Virtex-II Pro FPGA from Xilinx to offer ultra high performance and unprecedented I/O bandwidth. The T2PM matches a cluster of four ADSP-TS201 TigerSHARCs with: (1) High-bandwidth, low-latency off-board I/O, reconfigurable for nearly any application (2) High-speed interprocessor communication network to facilitate scalability (3) SharcFIN PCI-DSP bridge for integrating DSPs with PCI bus and other peripherals (4) Comprehensive software for ease-of-use. The board also provides a large on-board bank of SDRAM and flash memory for hostless boot.

Tiger-PMC: (from BittWare, Inc.)
The TSPM´s four ADSP-TS101S TigerSHARC DSPs share a common 83.3 MHz local bus, which also provides access to the SDRAM and SharcFIN ASIC. Each TigerSHARC provides 12 Gbytes/sec of internal memory bandwidth and features 6 Mbits of on-chip SRAM. It supports both fixed and floating point operation, providing 1500 MFLOPS of processing power for 32-bit floating point operations and 6 GOPS for 16-bit fixed point operations. Providing the backbone of the TSPM´s architecture is BittWare´s SharcFIN for the ADSP-TS101S. The SharcFIN features a comprehensive set of bus interfaces and peripherals for the ADSP-TS101S DSPs and provides a clean board-level implementation. It integrates a full 64-bit 66 MHz master PCI interface, an extensive flag and interrupt multiplexer, and a peripheral bus that interfaces the DSPs to peripherals such as the Flash memory. I/O interfaces on the TSPM include the PMC+ interface and four front-panel external link ports. The PMC+ interface consists of four connectors: three standard PMC connectors to provide the PCI interface and an additional PMC+ connector that provides four 250 Mbytes/sec link ports from the ADSP-TS101S DSPs to the carrier board. The TSPM attaches to any PMC capable carrier board, and when attached to one of BittWare´s PMC+ capable carrier boards, it can use the PMC+ link port connections for low-latency, tightly-coupled I/O.

TPMC630-10: (from TEWS TECHNOLGIES GmbH)
Reconfigurable FPGA with 64 TTL I/O Lines; PCI Target Controller (PCI9030) with user configurable FPGA (300000 system gates: Xilinx XC2S300E-6); FPGA development tool: Free Xilinx ISE WebPack; FPGA configuration by in system programmable FlashProm via PCI bus; several clock options by programmable clock generator; 64 digital TTL I/O lines; All I/O lines on HD68 SCSI-3 type connector in front panel and on P14; PCI I/O signaling voltage 3.3V and 5V; Operating temperature -40°C to +85°C

TPMC630-11: (from TEWS TECHNOLGIES GmbH)
Reconfigurable FPGA with 32 differential I/O Lines; PCI Target Controller (PCI9030) with user configurable FPGA (300000 system gates: Xilinx XC2S300E-6); FPGA development tool: Free Xilinx ISE WebPack; FPGA configuration by in system programmable FlashProm via PCI bus; several clock options by programmable clock generator; 32 differential I/O lines with on board termination; All I/O lines on HD68 SCSI-3 type connector in front panel and on P14; PCI I/O signaling voltage 3.3V and 5V; Operating temperature -40°C to +85°C

TPMC630-12: (from TEWS TECHNOLGIES GmbH)
Reconfigurable FPGA with 32 TTL I/O Lines and 16 differential I/O Lines; PCI Target Controller (PCI9030) with user configurable FPGA (300000 system gates: Xilinx XC2S300E-6); FPGA development tool: Free Xilinx ISE WebPack; FPGA configuration by in system programmable FlashProm via PCI bus; several clock options by programmable clock generator; 32 digital TTL I/O lines and 16 differential I/O lines with on board termination; All I/O lines on HD68 SCSI-3 type connector in front panel and on P14; PCI I/O signaling voltage 3.3V and 5V; Operating temperature -40°C to +85°C: The PMC-FPGA05 Kit is a Xilinx® Virtex™-5 XC5VLX110 platform FPGA based, PMC card with high speed digital I/O and PCI-X interface to the host computer.

Xilinx Virtex-5 FPGA The new generation of platform FPGA supports logic gates with hard-wired functionality, including high-speed serial communications and DSP multipliers, making them ideal for a wide range of reconfigurable computing applications. The PMC-FPGA05 enhances the processing power and flexibility of the Virtex-5 XC5VLX110 FPGA with large, independent pools of memory, a wide range of I/O possibilities and a comprehensive board support package.
Reef-PMC+: (from BittWare, Inc.)
Reconfigurable FPGA card with ADSP-21160. BittWare´s Reef-PMC+ (RFPM) is a reconfigurable FPGA board combining the power of the XILINX Virtex-II FPGA and the Analog Devices ADSP-21160 SHARC® DSP. Configurable for nearly any application, the RFPM allows system designers to take advantage of both the flexibility of a reconfigurable FPGA and the processing power of a general-purpose DSP. The Virtex-II features up to 1 million system gates, a flexible digital I/O interface, and reconfigurable computing blocks. And the ADSP-21160 DSP provides additional I/O and processing power for the board. Rounding out the RFPM´s feature set are a 64/66 PCI interface, a 64-512 MB bank of SDRAM, and 2 MB of Flash memory. The Virtex-II reconfigurable FPGA from XILINX is a powerful tool for designing custom digital interfaces based on IP cores and customized modules. The RFPM features a flexible digital I/O interface that provides up to 140 user I/O pins, each of which is individually configurable for any of nineteen single-ended I/O standards and six differential I/O standards, including LVDS, SSTL, HSTL II, and GTL+. Any two I/O pins can be used as a differential pair, providing maximum board layout flexibility. The Virtex-II is configured on power-up by the host or an on-board EPROM, and it supports reconfiguration “on-the-fly” from either the host or the ADSP-21160 DSP.

SPMC/DPMC-440 ProWare FPGA: (from Curtiss-Wright Controls, Inc.)
The PMC-440 ProWare PMC module provides systems integrators with a powerful, easy-to-use means to capture EO/IR and radar inputs, interface to legacy system elements, and perform sensor data pre-processing. The ProWare module offers flexibility with its choice of I/O options that include LVDS, LVTTL, and RocketIO. Ease-of-use is provided via a comprehensive ProWare Design Kit (PDK) that includes a library of IP modules, simulation testbench files, a reference design, and full documentation.

T2-PMC: (from BittWare, Inc.)
BittWare´s T2-PMC (T2PM) DSP board features the ADSP-TS201 TigerSHARC processor from Analog Devices. To take full advantage of this high-performance DSP, this multiprocessor PCI Mezzanine Card (PMC) implements BittWare´s ATLANTiS (Advanced Transfer Link Architecture for New TigerSHARC) architecture, which combines robust TigerSHARC processing with the versatile Virtex-II Pro FPGA from Xilinx to offer ultra high performance and unprecedented I/O bandwidth. The T2PM matches a cluster of four ADSP-TS201 TigerSHARCs with: (1) High-bandwidth, low-latency off-board I/O, reconfigurable for nearly any application (2) High-speed interprocessor communication network to facilitate scalability (3) SharcFIN PCI-DSP bridge for integrating DSPs with PCI bus and other peripherals (4) Comprehensive software for ease-of-use. The board also provides a large on-board bank of SDRAM and flash memory for hostless boot.

Tiger-PMC: (from BittWare, Inc.)
The TSPM´s four ADSP-TS101S TigerSHARC DSPs share a common 83.3 MHz local bus, which also provides access to the SDRAM and SharcFIN ASIC. Each TigerSHARC provides 12 Gbytes/sec of internal memory bandwidth and features 6 Mbits of on-chip SRAM. It supports both fixed and floating point operation, providing 1500 MFLOPS of processing power for 32-bit floating point operations and 6 GOPS for 16-bit fixed point operations. Providing the backbone of the TSPM´s architecture is BittWare´s SharcFIN for the ADSP-TS101S. The SharcFIN features a comprehensive set of bus interfaces and peripherals for the ADSP-TS101S DSPs and provides a clean board-level implementation. It integrates a full 64-bit 66 MHz master PCI interface, an extensive flag and interrupt multiplexer, and a peripheral bus that interfaces the DSPs to peripherals such as the Flash memory. I/O interfaces on the TSPM include the PMC+ interface and four front-panel external link ports. The PMC+ interface consists of four connectors: three standard PMC connectors to provide the PCI interface and an additional PMC+ connector that provides four 250 Mbytes/sec link ports from the ADSP-TS101S DSPs to the carrier board. The TSPM attaches to any PMC capable carrier board, and when attached to one of BittWare´s PMC+ capable carrier boards, it can use the PMC+ link port connections for low-latency, tightly-coupled I/O.

TPMC630-10: (from TEWS TECHNOLGIES GmbH)
Reconfigurable FPGA with 64 TTL I/O Lines; PCI Target Controller (PCI9030) with user configurable FPGA (300000 system gates: Xilinx XC2S300E-6); FPGA development tool: Free Xilinx ISE WebPack; FPGA configuration by in system programmable FlashProm via PCI bus; several clock options by programmable clock generator; 64 digital TTL I/O lines; All I/O lines on HD68 SCSI-3 type connector in front panel and on P14; PCI I/O signaling voltage 3.3V and 5V; Operating temperature -40°C to +85°C

TPMC630-11: (from TEWS TECHNOLGIES GmbH)
Reconfigurable FPGA with 32 differential I/O Lines; PCI Target Controller (PCI9030) with user configurable FPGA (300000 system gates: Xilinx XC2S300E-6); FPGA development tool: Free Xilinx ISE WebPack; FPGA configuration by in system programmable FlashProm via PCI bus; several clock options by programmable clock generator; 32 differential I/O lines with on board termination; All I/O lines on HD68 SCSI-3 type connector in front panel and on P14; PCI I/O signaling voltage 3.3V and 5V; Operating temperature -40°C to +85°C

TPMC630-12: (from TEWS TECHNOLGIES GmbH)
Reconfigurable FPGA with 32 TTL I/O Lines and 16 differential I/O Lines; PCI Target Controller (PCI9030) with user configurable FPGA (300000 system gates: Xilinx XC2S300E-6); FPGA development tool: Free Xilinx ISE WebPack; FPGA configuration by in system programmable FlashProm via PCI bus; several clock options by programmable clock generator; 32 digital TTL I/O lines and 16 differential I/O lines with on board termination; All I/O lines on HD68 SCSI-3 type connector in front panel and on P14; PCI I/O signaling voltage 3.3V and 5V; Operating temperature -40°C to +85°C: Reconfigurable FPGA card with ADSP-21160. BittWare´s Reef-PMC+ (RFPM) is a reconfigurable FPGA board combining the power of the XILINX Virtex-II FPGA and the Analog Devices ADSP-21160 SHARC® DSP. Configurable for nearly any application, the RFPM allows system designers to take advantage of both the flexibility of a reconfigurable FPGA and the processing power of a general-purpose DSP. The Virtex-II features up to 1 million system gates, a flexible digital I/O interface, and reconfigurable computing blocks. And the ADSP-21160 DSP provides additional I/O and processing power for the board. Rounding out the RFPM´s feature set are a 64/66 PCI interface, a 64-512 MB bank of SDRAM, and 2 MB of Flash memory. The Virtex-II reconfigurable FPGA from XILINX is a powerful tool for designing custom digital interfaces based on IP cores and customized modules. The RFPM features a flexible digital I/O interface that provides up to 140 user I/O pins, each of which is individually configurable for any of nineteen single-ended I/O standards and six differential I/O standards, including LVDS, SSTL, HSTL II, and GTL+. Any two I/O pins can be used as a differential pair, providing maximum board layout flexibility. The Virtex-II is configured on power-up by the host or an on-board EPROM, and it supports reconfiguration “on-the-fly” from either the host or the ADSP-21160 DSP.
SPMC/DPMC-440 ProWare FPGA: (from Curtiss-Wright Controls, Inc.)
The PMC-440 ProWare PMC module provides systems integrators with a powerful, easy-to-use means to capture EO/IR and radar inputs, interface to legacy system elements, and perform sensor data pre-processing. The ProWare module offers flexibility with its choice of I/O options that include LVDS, LVTTL, and RocketIO. Ease-of-use is provided via a comprehensive ProWare Design Kit (PDK) that includes a library of IP modules, simulation testbench files, a reference design, and full documentation.

T2-PMC: (from BittWare, Inc.)
BittWare´s T2-PMC (T2PM) DSP board features the ADSP-TS201 TigerSHARC processor from Analog Devices. To take full advantage of this high-performance DSP, this multiprocessor PCI Mezzanine Card (PMC) implements BittWare´s ATLANTiS (Advanced Transfer Link Architecture for New TigerSHARC) architecture, which combines robust TigerSHARC processing with the versatile Virtex-II Pro FPGA from Xilinx to offer ultra high performance and unprecedented I/O bandwidth. The T2PM matches a cluster of four ADSP-TS201 TigerSHARCs with: (1) High-bandwidth, low-latency off-board I/O, reconfigurable for nearly any application (2) High-speed interprocessor communication network to facilitate scalability (3) SharcFIN PCI-DSP bridge for integrating DSPs with PCI bus and other peripherals (4) Comprehensive software for ease-of-use. The board also provides a large on-board bank of SDRAM and flash memory for hostless boot.

Tiger-PMC: (from BittWare, Inc.)
The TSPM´s four ADSP-TS101S TigerSHARC DSPs share a common 83.3 MHz local bus, which also provides access to the SDRAM and SharcFIN ASIC. Each TigerSHARC provides 12 Gbytes/sec of internal memory bandwidth and features 6 Mbits of on-chip SRAM. It supports both fixed and floating point operation, providing 1500 MFLOPS of processing power for 32-bit floating point operations and 6 GOPS for 16-bit fixed point operations. Providing the backbone of the TSPM´s architecture is BittWare´s SharcFIN for the ADSP-TS101S. The SharcFIN features a comprehensive set of bus interfaces and peripherals for the ADSP-TS101S DSPs and provides a clean board-level implementation. It integrates a full 64-bit 66 MHz master PCI interface, an extensive flag and interrupt multiplexer, and a peripheral bus that interfaces the DSPs to peripherals such as the Flash memory. I/O interfaces on the TSPM include the PMC+ interface and four front-panel external link ports. The PMC+ interface consists of four connectors: three standard PMC connectors to provide the PCI interface and an additional PMC+ connector that provides four 250 Mbytes/sec link ports from the ADSP-TS101S DSPs to the carrier board. The TSPM attaches to any PMC capable carrier board, and when attached to one of BittWare´s PMC+ capable carrier boards, it can use the PMC+ link port connections for low-latency, tightly-coupled I/O.

TPMC630-10: (from TEWS TECHNOLGIES GmbH)
Reconfigurable FPGA with 64 TTL I/O Lines; PCI Target Controller (PCI9030) with user configurable FPGA (300000 system gates: Xilinx XC2S300E-6); FPGA development tool: Free Xilinx ISE WebPack; FPGA configuration by in system programmable FlashProm via PCI bus; several clock options by programmable clock generator; 64 digital TTL I/O lines; All I/O lines on HD68 SCSI-3 type connector in front panel and on P14; PCI I/O signaling voltage 3.3V and 5V; Operating temperature -40°C to +85°C

TPMC630-11: (from TEWS TECHNOLGIES GmbH)
Reconfigurable FPGA with 32 differential I/O Lines; PCI Target Controller (PCI9030) with user configurable FPGA (300000 system gates: Xilinx XC2S300E-6); FPGA development tool: Free Xilinx ISE WebPack; FPGA configuration by in system programmable FlashProm via PCI bus; several clock options by programmable clock generator; 32 differential I/O lines with on board termination; All I/O lines on HD68 SCSI-3 type connector in front panel and on P14; PCI I/O signaling voltage 3.3V and 5V; Operating temperature -40°C to +85°C

TPMC630-12: (from TEWS TECHNOLGIES GmbH)
Reconfigurable FPGA with 32 TTL I/O Lines and 16 differential I/O Lines; PCI Target Controller (PCI9030) with user configurable FPGA (300000 system gates: Xilinx XC2S300E-6); FPGA development tool: Free Xilinx ISE WebPack; FPGA configuration by in system programmable FlashProm via PCI bus; several clock options by programmable clock generator; 32 digital TTL I/O lines and 16 differential I/O lines with on board termination; All I/O lines on HD68 SCSI-3 type connector in front panel and on P14; PCI I/O signaling voltage 3.3V and 5V; Operating temperature -40°C to +85°C: The PMC-440 ProWare PMC module provides systems integrators with a powerful, easy-to-use means to capture EO/IR and radar inputs, interface to legacy system elements, and perform sensor data pre-processing. The ProWare module offers flexibility with its choice of I/O options that include LVDS, LVTTL, and RocketIO. Ease-of-use is provided via a comprehensive ProWare Design Kit (PDK) that includes a library of IP modules, simulation testbench files, a reference design, and full documentation.
T2-PMC: (from BittWare, Inc.)
BittWare´s T2-PMC (T2PM) DSP board features the ADSP-TS201 TigerSHARC processor from Analog Devices. To take full advantage of this high-performance DSP, this multiprocessor PCI Mezzanine Card (PMC) implements BittWare´s ATLANTiS (Advanced Transfer Link Architecture for New TigerSHARC) architecture, which combines robust TigerSHARC processing with the versatile Virtex-II Pro FPGA from Xilinx to offer ultra high performance and unprecedented I/O bandwidth. The T2PM matches a cluster of four ADSP-TS201 TigerSHARCs with: (1) High-bandwidth, low-latency off-board I/O, reconfigurable for nearly any application (2) High-speed interprocessor communication network to facilitate scalability (3) SharcFIN PCI-DSP bridge for integrating DSPs with PCI bus and other peripherals (4) Comprehensive software for ease-of-use. The board also provides a large on-board bank of SDRAM and flash memory for hostless boot.

Tiger-PMC: (from BittWare, Inc.)
The TSPM´s four ADSP-TS101S TigerSHARC DSPs share a common 83.3 MHz local bus, which also provides access to the SDRAM and SharcFIN ASIC. Each TigerSHARC provides 12 Gbytes/sec of internal memory bandwidth and features 6 Mbits of on-chip SRAM. It supports both fixed and floating point operation, providing 1500 MFLOPS of processing power for 32-bit floating point operations and 6 GOPS for 16-bit fixed point operations. Providing the backbone of the TSPM´s architecture is BittWare´s SharcFIN for the ADSP-TS101S. The SharcFIN features a comprehensive set of bus interfaces and peripherals for the ADSP-TS101S DSPs and provides a clean board-level implementation. It integrates a full 64-bit 66 MHz master PCI interface, an extensive flag and interrupt multiplexer, and a peripheral bus that interfaces the DSPs to peripherals such as the Flash memory. I/O interfaces on the TSPM include the PMC+ interface and four front-panel external link ports. The PMC+ interface consists of four connectors: three standard PMC connectors to provide the PCI interface and an additional PMC+ connector that provides four 250 Mbytes/sec link ports from the ADSP-TS101S DSPs to the carrier board. The TSPM attaches to any PMC capable carrier board, and when attached to one of BittWare´s PMC+ capable carrier boards, it can use the PMC+ link port connections for low-latency, tightly-coupled I/O.

TPMC630-10: (from TEWS TECHNOLGIES GmbH)
Reconfigurable FPGA with 64 TTL I/O Lines; PCI Target Controller (PCI9030) with user configurable FPGA (300000 system gates: Xilinx XC2S300E-6); FPGA development tool: Free Xilinx ISE WebPack; FPGA configuration by in system programmable FlashProm via PCI bus; several clock options by programmable clock generator; 64 digital TTL I/O lines; All I/O lines on HD68 SCSI-3 type connector in front panel and on P14; PCI I/O signaling voltage 3.3V and 5V; Operating temperature -40°C to +85°C

TPMC630-11: (from TEWS TECHNOLGIES GmbH)
Reconfigurable FPGA with 32 differential I/O Lines; PCI Target Controller (PCI9030) with user configurable FPGA (300000 system gates: Xilinx XC2S300E-6); FPGA development tool: Free Xilinx ISE WebPack; FPGA configuration by in system programmable FlashProm via PCI bus; several clock options by programmable clock generator; 32 differential I/O lines with on board termination; All I/O lines on HD68 SCSI-3 type connector in front panel and on P14; PCI I/O signaling voltage 3.3V and 5V; Operating temperature -40°C to +85°C

TPMC630-12: (from TEWS TECHNOLGIES GmbH)
Reconfigurable FPGA with 32 TTL I/O Lines and 16 differential I/O Lines; PCI Target Controller (PCI9030) with user configurable FPGA (300000 system gates: Xilinx XC2S300E-6); FPGA development tool: Free Xilinx ISE WebPack; FPGA configuration by in system programmable FlashProm via PCI bus; several clock options by programmable clock generator; 32 digital TTL I/O lines and 16 differential I/O lines with on board termination; All I/O lines on HD68 SCSI-3 type connector in front panel and on P14; PCI I/O signaling voltage 3.3V and 5V; Operating temperature -40°C to +85°C: BittWare´s T2-PMC (T2PM) DSP board features the ADSP-TS201 TigerSHARC processor from Analog Devices. To take full advantage of this high-performance DSP, this multiprocessor PCI Mezzanine Card (PMC) implements BittWare´s ATLANTiS (Advanced Transfer Link Architecture for New TigerSHARC) architecture, which combines robust TigerSHARC processing with the versatile Virtex-II Pro FPGA from Xilinx to offer ultra high performance and unprecedented I/O bandwidth. The T2PM matches a cluster of four ADSP-TS201 TigerSHARCs with: (1) High-bandwidth, low-latency off-board I/O, reconfigurable for nearly any application (2) High-speed interprocessor communication network to facilitate scalability (3) SharcFIN PCI-DSP bridge for integrating DSPs with PCI bus and other peripherals (4) Comprehensive software for ease-of-use. The board also provides a large on-board bank of SDRAM and flash memory for hostless boot.
Tiger-PMC: (from BittWare, Inc.)
The TSPM´s four ADSP-TS101S TigerSHARC DSPs share a common 83.3 MHz local bus, which also provides access to the SDRAM and SharcFIN ASIC. Each TigerSHARC provides 12 Gbytes/sec of internal memory bandwidth and features 6 Mbits of on-chip SRAM. It supports both fixed and floating point operation, providing 1500 MFLOPS of processing power for 32-bit floating point operations and 6 GOPS for 16-bit fixed point operations. Providing the backbone of the TSPM´s architecture is BittWare´s SharcFIN for the ADSP-TS101S. The SharcFIN features a comprehensive set of bus interfaces and peripherals for the ADSP-TS101S DSPs and provides a clean board-level implementation. It integrates a full 64-bit 66 MHz master PCI interface, an extensive flag and interrupt multiplexer, and a peripheral bus that interfaces the DSPs to peripherals such as the Flash memory. I/O interfaces on the TSPM include the PMC+ interface and four front-panel external link ports. The PMC+ interface consists of four connectors: three standard PMC connectors to provide the PCI interface and an additional PMC+ connector that provides four 250 Mbytes/sec link ports from the ADSP-TS101S DSPs to the carrier board. The TSPM attaches to any PMC capable carrier board, and when attached to one of BittWare´s PMC+ capable carrier boards, it can use the PMC+ link port connections for low-latency, tightly-coupled I/O.

TPMC630-10: (from TEWS TECHNOLGIES GmbH)
Reconfigurable FPGA with 64 TTL I/O Lines; PCI Target Controller (PCI9030) with user configurable FPGA (300000 system gates: Xilinx XC2S300E-6); FPGA development tool: Free Xilinx ISE WebPack; FPGA configuration by in system programmable FlashProm via PCI bus; several clock options by programmable clock generator; 64 digital TTL I/O lines; All I/O lines on HD68 SCSI-3 type connector in front panel and on P14; PCI I/O signaling voltage 3.3V and 5V; Operating temperature -40°C to +85°C

TPMC630-11: (from TEWS TECHNOLGIES GmbH)
Reconfigurable FPGA with 32 differential I/O Lines; PCI Target Controller (PCI9030) with user configurable FPGA (300000 system gates: Xilinx XC2S300E-6); FPGA development tool: Free Xilinx ISE WebPack; FPGA configuration by in system programmable FlashProm via PCI bus; several clock options by programmable clock generator; 32 differential I/O lines with on board termination; All I/O lines on HD68 SCSI-3 type connector in front panel and on P14; PCI I/O signaling voltage 3.3V and 5V; Operating temperature -40°C to +85°C

TPMC630-12: (from TEWS TECHNOLGIES GmbH)
Reconfigurable FPGA with 32 TTL I/O Lines and 16 differential I/O Lines; PCI Target Controller (PCI9030) with user configurable FPGA (300000 system gates: Xilinx XC2S300E-6); FPGA development tool: Free Xilinx ISE WebPack; FPGA configuration by in system programmable FlashProm via PCI bus; several clock options by programmable clock generator; 32 digital TTL I/O lines and 16 differential I/O lines with on board termination; All I/O lines on HD68 SCSI-3 type connector in front panel and on P14; PCI I/O signaling voltage 3.3V and 5V; Operating temperature -40°C to +85°C: The TSPM´s four ADSP-TS101S TigerSHARC DSPs share a common 83.3 MHz local bus, which also provides access to the SDRAM and SharcFIN ASIC. Each TigerSHARC provides 12 Gbytes/sec of internal memory bandwidth and features 6 Mbits of on-chip SRAM. It supports both fixed and floating point operation, providing 1500 MFLOPS of processing power for 32-bit floating point operations and 6 GOPS for 16-bit fixed point operations. Providing the backbone of the TSPM´s architecture is BittWare´s SharcFIN for the ADSP-TS101S. The SharcFIN features a comprehensive set of bus interfaces and peripherals for the ADSP-TS101S DSPs and provides a clean board-level implementation. It integrates a full 64-bit 66 MHz master PCI interface, an extensive flag and interrupt multiplexer, and a peripheral bus that interfaces the DSPs to peripherals such as the Flash memory. I/O interfaces on the TSPM include the PMC+ interface and four front-panel external link ports. The PMC+ interface consists of four connectors: three standard PMC connectors to provide the PCI interface and an additional PMC+ connector that provides four 250 Mbytes/sec link ports from the ADSP-TS101S DSPs to the carrier board. The TSPM attaches to any PMC capable carrier board, and when attached to one of BittWare´s PMC+ capable carrier boards, it can use the PMC+ link port connections for low-latency, tightly-coupled I/O.
TPMC630-10: (from TEWS TECHNOLGIES GmbH)
Reconfigurable FPGA with 64 TTL I/O Lines; PCI Target Controller (PCI9030) with user configurable FPGA (300000 system gates: Xilinx XC2S300E-6); FPGA development tool: Free Xilinx ISE WebPack; FPGA configuration by in system programmable FlashProm via PCI bus; several clock options by programmable clock generator; 64 digital TTL I/O lines; All I/O lines on HD68 SCSI-3 type connector in front panel and on P14; PCI I/O signaling voltage 3.3V and 5V; Operating temperature -40°C to +85°C

TPMC630-11: (from TEWS TECHNOLGIES GmbH)
Reconfigurable FPGA with 32 differential I/O Lines; PCI Target Controller (PCI9030) with user configurable FPGA (300000 system gates: Xilinx XC2S300E-6); FPGA development tool: Free Xilinx ISE WebPack; FPGA configuration by in system programmable FlashProm via PCI bus; several clock options by programmable clock generator; 32 differential I/O lines with on board termination; All I/O lines on HD68 SCSI-3 type connector in front panel and on P14; PCI I/O signaling voltage 3.3V and 5V; Operating temperature -40°C to +85°C

TPMC630-12: (from TEWS TECHNOLGIES GmbH)
Reconfigurable FPGA with 32 TTL I/O Lines and 16 differential I/O Lines; PCI Target Controller (PCI9030) with user configurable FPGA (300000 system gates: Xilinx XC2S300E-6); FPGA development tool: Free Xilinx ISE WebPack; FPGA configuration by in system programmable FlashProm via PCI bus; several clock options by programmable clock generator; 32 digital TTL I/O lines and 16 differential I/O lines with on board termination; All I/O lines on HD68 SCSI-3 type connector in front panel and on P14; PCI I/O signaling voltage 3.3V and 5V; Operating temperature -40°C to +85°C: Reconfigurable FPGA with 64 TTL I/O Lines; PCI Target Controller (PCI9030) with user configurable FPGA (300000 system gates: Xilinx XC2S300E-6); FPGA development tool: Free Xilinx ISE WebPack; FPGA configuration by in system programmable FlashProm via PCI bus; several clock options by programmable clock generator; 64 digital TTL I/O lines; All I/O lines on HD68 SCSI-3 type connector in front panel and on P14; PCI I/O signaling voltage 3.3V and 5V; Operating temperature -40°C to +85°C
TPMC630-11: (from TEWS TECHNOLGIES GmbH)
Reconfigurable FPGA with 32 differential I/O Lines; PCI Target Controller (PCI9030) with user configurable FPGA (300000 system gates: Xilinx XC2S300E-6); FPGA development tool: Free Xilinx ISE WebPack; FPGA configuration by in system programmable FlashProm via PCI bus; several clock options by programmable clock generator; 32 differential I/O lines with on board termination; All I/O lines on HD68 SCSI-3 type connector in front panel and on P14; PCI I/O signaling voltage 3.3V and 5V; Operating temperature -40°C to +85°C

TPMC630-12: (from TEWS TECHNOLGIES GmbH)
Reconfigurable FPGA with 32 TTL I/O Lines and 16 differential I/O Lines; PCI Target Controller (PCI9030) with user configurable FPGA (300000 system gates: Xilinx XC2S300E-6); FPGA development tool: Free Xilinx ISE WebPack; FPGA configuration by in system programmable FlashProm via PCI bus; several clock options by programmable clock generator; 32 digital TTL I/O lines and 16 differential I/O lines with on board termination; All I/O lines on HD68 SCSI-3 type connector in front panel and on P14; PCI I/O signaling voltage 3.3V and 5V; Operating temperature -40°C to +85°C: Reconfigurable FPGA with 32 differential I/O Lines; PCI Target Controller (PCI9030) with user configurable FPGA (300000 system gates: Xilinx XC2S300E-6); FPGA development tool: Free Xilinx ISE WebPack; FPGA configuration by in system programmable FlashProm via PCI bus; several clock options by programmable clock generator; 32 differential I/O lines with on board termination; All I/O lines on HD68 SCSI-3 type connector in front panel and on P14; PCI I/O signaling voltage 3.3V and 5V; Operating temperature -40°C to +85°C
TPMC630-12: (from TEWS TECHNOLGIES GmbH)
Reconfigurable FPGA with 32 TTL I/O Lines and 16 differential I/O Lines; PCI Target Controller (PCI9030) with user configurable FPGA (300000 system gates: Xilinx XC2S300E-6); FPGA development tool: Free Xilinx ISE WebPack; FPGA configuration by in system programmable FlashProm via PCI bus; several clock options by programmable clock generator; 32 digital TTL I/O lines and 16 differential I/O lines with on board termination; All I/O lines on HD68 SCSI-3 type connector in front panel and on P14; PCI I/O signaling voltage 3.3V and 5V; Operating temperature -40°C to +85°C: Reconfigurable FPGA with 32 TTL I/O Lines and 16 differential I/O Lines; PCI Target Controller (PCI9030) with user configurable FPGA (300000 system gates: Xilinx XC2S300E-6); FPGA development tool: Free Xilinx ISE WebPack; FPGA configuration by in system programmable FlashProm via PCI bus; several clock options by programmable clock generator; 32 digital TTL I/O lines and 16 differential I/O lines with on board termination; All I/O lines on HD68 SCSI-3 type connector in front panel and on P14; PCI I/O signaling voltage 3.3V and 5V; Operating temperature -40°C to +85°C